Skip to Page ContentToggle navigationHomeAbout Us OverviewPolicies and ProceduresBoard of DirectorsMembersHow to JoinFAQAwardsDesign & Verification ConferenceContact UsSite HelpConfirm your email addressEmail Thank YouThe Early History of AccelleraTechnical Activities OverviewWorking GroupsProposed Working GroupsIEEE ActivitiesAcronyms and DefinitionsDownloads OverviewAccellera StandardsDrafts Under Public ReviewIEEE StandardsCommunity OverviewIP-XACT CommunityOCP CommunityPortable Stimulus CommunitySystemC CommunityUVM CommunityResources OverviewVideosArticles and InsightsForumsRegional User GroupsRelated WebsitesNews & Events Press ReleasesEventsMedia CoverageNewslettersWorkspaceXML Schema SPIRITIP-XACTBusDefs BusDef DocumentationMember Sign inNew SystemC Tutorial AvailableSystemC: Focusing on High-Level Synthesis and Functional Coverage for SystemCConsisting of five parts, this latest SystemC tutorial was presented at DVCon U.S. 2019 by members of the SystemC Working Groups.High-Level Synthesis with SystemC: An Introduction — This section describes the fundamental structures of a SystemC design model and what is abstracted in a SystemC model that is explicit in an RTL model. It shows how HLS tools are used to concretize the abstraction into the desired structures in the RTL model, productivity benefits, and the remaining challenges in typical HLS flows.High-Level Synthesis: Model Structure and Data Types — This section covers SystemC model structure and data types for synthesis and how they differ in important ways from models used for virtual platform development and other purposes. Differences include restrictions in the C++ and SystemC constructs that can be used and a much greater use of SystemC bit-accurate datatypes and fixed-point datatypes.High-Level Synthesis: Lessons Learned - Intel's Experience — This section presents lessons learned in a wide-scale deployment, including techniques for triaging HLS errors, how HLS fits in power flows, and techniques repurposed from the software engineering world to make code easier to maintain over multiple generations.Functional Coverage for SystemC (FC4SC) — This section provides an introduction into the capabilities of Functional Coverage for SystemC (FC4SC), a header-only library that provides mechanisms for functional coverage definition, collection and reporting that can be used in any application which is compliant with the C++ standard.Accellera SystemC Working Group Update — A brief update on recent and upcoming working group activities.View tutorial >The Value of MembershipLu Dai discusses the value of Accellera membership during an interview with EDACaféIn a recent interview with Sanjay Gangal, president of IBSystems, Accellera Chair Lu Dai explains the value of Accellera membership for both user and vendor companies. During the interview at the 56th Design Automation Conference in Las Vegas, Lu describes how standards are initiated within the organization, as well as how compa